The terms Micro Channel, Micro Channel architecture, or just MCA, all refer to the same thing: a kind of expansion bus used in PCs. MCA was a distinct break from previous bus architectures such as Industry Standard Architecture. The pin connections in MCA are smaller than other bus interfaces. For this and other reasons, MCA does not support other bus architectures. Although MCA offers a number of improvements over other bus architectures, its proprietary, nonstandard aspects did not encourage other manufacturers to adopt it.
It has influenced other bus designs and it is still in use in PS/2s and in some minicomputer systems. The MCA bus was IBM’s attempt to replace the ISA bus with something “bigger and better”. When the 80386DX was introduced in the mid-80s with its 32-bit data bus, IBM decided to create a bus to match this width. MCA is 32 bits wide, and offers several significant improvements over ISA. The MCA bus has some pretty impressive features considering that it was introduced in 1987, a full seven years before the PCI bus made similar features common on the Pc. In some ways it was ahead of its time, because back then the ISA bus really wasn’t a major performance limiting factor:
32 Bit Bus Width: The MCA bus features a full 32 bit bus width, the same width as the VESA and PCI local buses. It had far superior throughput to the ISA bus.
Bus Mastering: The MCA bus supported bus mastering adapters for greater efficiency, including proper bus arbitration.
Plug and Play: MCA automatically configured adapter cards, so there was no need to fiddle with jumpers. This was eight years before Windows 95 brought PnP into the mainstream!
MCA had a great deal of potential. Unfortunately, IBM made two decisions that would doom MCA to utter failure in the marketplace. First, they made MCA incompatible with ISA, this means ISA cards will not work at all in an MCA system, one of the few categories of PCs for which this is true. The PC market is very sensitive to backwards-compatibility issues, as evidenced by the number of older standards that persist to this day. Second, IBM decided to make the MCA bus proprietary. It in fact did this with ISA as well, however in 1981 IBM could afford to flex its muscles in this manner, while by this time the clone makers were starting to come into their own and weren’t interested in bending to IBM’s wishes.
These two factors, combined with the increased cost of MCA systems, led to the demise of the MCA bus. With the PS/2 now discontinued, MCA is dead on the PC platform, though it is still used by IBM on some of its RISC 6000 UNIX servers. It is one of the classical examples in the field of computing of how non-technical issues often dominate over technical ones. But one of MCA’s disadvantages is that it has poor DMA controller circuitry.
Features of Micro Channel Architecture
• I/O data transfers of 8-, 16-, 24-, or 32-bits within a 64KB address space (16-bit address width).
• Memory data transfers of 8-, 16-, 24-, or 32-bits within a 16MB (24-bit address width) or 4GB (32-bit address width) address space.
• An arbitration procedure that enables up to 15 devices and the system master to bid for control of the channel.
• A basic transfer procedure that allows data transfers between masters and slaves.
• A direct memory access (DMA) procedure that supports multiple DMA channels. Additionally, this procedure allows a device to transfer data in bursts.
• An optional streaming data procedure that provides a faster data-transfer rate than the basic transfer procedure and allows 64-bit data transfers.
• Address- and data-parity enable and detect procedures.
• Interrupt sharing on all levels.
• A flexible system-configuration procedure that uses programmable registers.
• An adapter interface to the channel using:
• A 16-bit connector with a 24-bit address bus and a 16-bit data bus
• A 32-bit connector with a 32-bit address bus and a 32-bit data bus
• An optional matched-memory extension
• An optional video extension.
• Support for audio signal transfer (audio voltage-sum node).
• Support for both synchronous and asynchronous data transfer.
• An exception condition reporting procedure.
• Improved electromagnetic characteristics.